1. Field of the Invention
The present invention generally relates to a semiconductor device, and more specifically, it relates to a semiconductor device having a semiconductor chip fixed to a die pad.
2. Description of the Background Art
A semiconductor device mounted with a plurality of semiconductor chips is referred to as an MCP (multi chip package). In the MCP, the semiconductor chips must be densely mounted on the same package, in order to implement miniaturization or high-speed operability. Japanese Patent Laying-Open No. 2001-127244 discloses such a multi chip semiconductor device.
FIG. 14 is a plan view showing the multi chip semiconductor device disclosed in Japanese Patent Laying-Open No. 2001-127244. FIG. 15 is a sectional view of the multi chip semiconductor device taken along the line XVxe2x80x94XV in FIG. 14.
Referring to FIGS. 14 and 15, the multi chip semiconductor device 101 comprises a plurality of inner leads 103 extending from the outer periphery toward the center and an island 102 formed at the center. Suspended leads 102a extending from four corners for supporting the island 102 and the suspended leads 102a and the inner leads 103 are integrated with each other on the outer periphery to form a frame part (not shown). The island 102, the suspended leads 102a, the inner leads 103 and the frame part form a lead frame. An opening 107 is formed at the center of the island 102.
An upper chip 106 is provided to bridge the opening 107. A lower chip 105 is provided to be stored in the opening 107. The upper and lower chips 106 and 105 are so provided as to set active element surfaces 106a and 105a thereof in the same direction. Bonding wires 104 electrically connect the active element surfaces 106a and 105a of the upper and lower chips 106 and 105 and the inner leads 103 with each other.
In the aforementioned multi chip semiconductor device 101, the upper chip 106 widely covers the active element surface 105a of the lower chip 105. In the active element surface 105a of the lower chip 105, therefore, only regions 105b not overlapping with the upper chip 106 can be connected with the inner leads 103 through the bonding wires 104. Bonding of the multi chip semiconductor device 101 cannot be freely designed but interconnection of the bonding wires 104 may be complicated due to such limitation.
In order to mount semiconductor chips on the multi chip semiconductor device 101, the upper and lower chips 106 and 105 must be so shaped or superposed as to leave the regions 105b not overlapping with the upper chip 106 on the active element surface 105a of the lower chip 105. In the multi chip semiconductor device 101, therefore, the upper and lower chips 106 and 105 are formed to have rectangular surfaces and so provided on the island 102 that the long sides of the rectangular surfaces are orthogonal to each other. When the upper and lower chips 106 and 105 are shaped or superposed in such a limited manner, however, design of the semiconductor device 101 is remarkably limited.
In order to solve the aforementioned problem, an object of the present invention is to provide a semiconductor device, having a high degree of freedom in design, mounted with semiconductor chips in high density.
The semiconductor device according to the present invention comprises a die pad having an opening, a first semiconductor chip located in the opening and a second semiconductor chip. The first semiconductor chip has a first surface forming a terminal surface and a second surface positioned opposite to the first surface. The second semiconductor chip has a third surface facing the second surface and the die pad and a fourth surface, positioned opposite to the third surface, forming a terminal surface.
According to the semiconductor device having the aforementioned structure, the first and second semiconductor chips are so provided on the die pad as to direct the first and fourth surfaces forming terminal surfaces opposite to each other, whereby the terminal surfaces do not overlap with the first or second semiconductor chip. Therefore, the first and second semiconductor chips can be bonded to each other along the overall first and fourth surfaces forming terminal surfaces. The terminal surfaces not overlapping with the first or second semiconductor chip are not narrowed to restrict the bonding design. Further, the first and the second semiconductor chips can be shaped or combined with no limitation resulting from provision of the terminal surfaces. In addition, the die pad has the opening for locating the first semiconductor chip therein, whereby the total height of the semiconductor device can be reduced due to the overlap of the thicknesses of the opening of the die pad and the first semiconductor chip.
Preferably, the semiconductor device further comprises a bonding wire connected to the first and fourth surfaces, a lead terminal connected to the bonding wire and a resin member provided to cover the first and second semiconductor chips, part of the lead terminal, the bonding wire and the die pad. According to the semiconductor device having this structure, the first and second semiconductor chips are provided on the die pad and the bonding wire is connected to the lead terminal formed independently of the die pad, whereby heat generated in a bonding step can be efficiently radiated from the semiconductor chips. Further, the first and second semiconductor chips mounted on the die pad are improved in torsional strength in mounting. In addition, the bonding wire employed for connecting the first or second semiconductor chip and the lead terminal with each other can absorb an error in the fixed position of the semiconductor chip. Therefore, the degree of freedom in design of the fixed position of the semiconductor chip can be improved.